The main architectural features of the RISC (Reduced Instruction Set Computer)

Type :

Presentation

Pages :

6 pages

Format :

.doc

Published date :

07/07/2008

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Summary :

 
 

Table of Contents The main architectural features of the RISC (Reduced Instruction Set Computer) Table of Contents

 
  1. Introduction.
  2. RISC processors: An overview
  3. RISC architecture
  4. Instruction sets and formats used
  5. Registers in RISC
  6. Instruction level pipelining.
  7. Comparison of RISC and CISC
  8. Conclusion
  9. Works cited

Abstract

The world of computer technology has evolved rather rapidly in the past two decades. Interestingly, while the number of languages and programs available has increased, the specific architectures that are used for building microprocessors have not changed that dramatically. What this effectively suggests is that when one looks at the evolution of computers and computer technology, some degree of congruence and similarity can be seen, especially with respect to the specific architecture being utilized.With the realization that computer architecture has not changed that drastically in recent years, there is a clear impetus to examine this issue and explore why this has been so. Utilizing this as a basis for investigation, this research considers the main architectural features of the risc, or reduced instruction set computer, processor. Specifically, this research considers risc characteristics, instruction set and formats used, use of register files, instruction level pipelining, risc processor selection and the advantages and disadvantages of risc.

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About the author :

pencil image Sunmade A. research
Level :Advanced Study : Accounting School/University : westminster

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